Read errors can occur in various types of memory, such as magneto-resistive random access memory (MRAM). MRAM is a form of non-volatile memory in which data can be stored by adjusting a resistance in a magnetic tunneling junction (MTJ) of a memory cell. For instance, the resistance of an MTJ can be switched between a high resistance state and a low resistance state. In an MRAM, a current induced magnetic field can switch the magnetization of the MTJ to switch between states.
Certain types of memory can encounter relatively high read error rates. Such error rates can be caused by several different sources or mechanisms or non-uniformities in the memory. Due to non-uniformities in manufacturing, different memory cells in the same memory array may not be matched with each other. For instance, in some MRAMs that store binary states, the variability in the memory cells can cause a relatively high variation in the distribution in resistance for both the low resistance states and high resistance states for memory cells in the same memory array.
Current methods for reading memory may have difficulty in measuring MRAM read margin. Also, current methods for reading memory may rely on a complicated reference cell set/reset operation. Certain methods for reading memory utilize multiple fixed reference cells and complicate the identification of distribution tail reference bits. Also, current methods may be hindered by reference cell disturb failures.
In view of the foregoing, it is desirable to provide an improved integrated circuit and method for operating memory, as compared to conventional devices. Furthermore, it is also desirable to provide methods for operating memory in which only a single state reference cell is utilized. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background.